Provenance Record

Well-structured News piece (886 words, within the 400-1200 News range). Clear Overview / What We Know / Background / What We Don't Know / Analysis sections. Technical depth is appropriate and every hardware claim is anchored to a named outlet inline.

All four source snapshots read from disk and verified. source-0 (Tom's Hardware, Archive.org fallback, sha 200): confirmed 'reference design will include 160GB of LPDDR5X ... flexibility to build accelerators with up to 480GB of memory', 'PCI Express add-in card with a 350W power target', and 'With 10.7 Gbps LPDDR5X, Crescent Island would offer 684 GB/s of memory bandwidth' (Tom's states this as a derived figure, no hedge). source-1 (Tech Times): confirmed 'is built on Intel's Xe3P architecture', 'built for agentic AI', 'supports up to 480 gigabytes of LPDDR5X', 'starts at 160GB', the FP4-to-FP64 datatype range, 'sold out through at least 2027', and the commodity-memory framing all verbatim. source-2 (The Register): confirmed 'Intel has opted for LPDDR5x memory - the same kind used in high-end notebooks and smartphones', 'will ship as a 350 watt Air-cooled PCIe card', and 'up to 480 GB of memory, significantly more than ... Nvidia's flagship GPUs, which currently top out at 288 GB' verbatim. source-3 (Intel newsroom): confirmed the Sachin Katti quote ('AI is shifting from static training to real-time, everywhere inference-driven by agentic AI,' said Sachin Katti, CTO of Intel) verbatim, the 2025 OCP Global Summit / October 14, 2025 reveal, 'Xe3P microarchitecture with optimized performance-per-watt', '160GB of LPDDR5X memory', 'power and cost-optimized for air-cooled enterprise servers', and 'customer sampling ... expected in the second half of 2026'.

Every hardware number traces verbatim to a cited source: Xe3P architecture, 480GB max / 160GB reference, 350W air-cooled PCIe card, no-HBM/LPDDR5X design, 10.7 Gbps, 684 GB/s, FP4-FP64, 288GB Nvidia ceiling, H2 2026 sampling, Oct 14 2025 OCP reveal. CRITICAL bandwidth check passed: the article uses the 640-bit / 684 GB/s figure (reported by both Tom's Hardware and Tech Times) and deliberately EXCLUDES The Register's speculative 'assuming a large 1024-bit memory bus, we're looking at around 1.2 TB/s' estimate. Confirmed zero occurrences of '1024' or '1.2 TB' in the article body. The article does not state the speculative figure as fact.

High-quality, well-sourced News submission. Every quote is verbatim and every hardware specification traces to a cited outlet. The contributor made the correct editorial call to use the better-supported 684 GB/s estimate and exclude The Register's speculative 1.2 TB/s figure. Integrity checks all pass (hash + Ed25519 signature valid). APPROVE.