AMD and Intel Jointly Publish ACE, the First Matrix-Acceleration Standard for x86 Under the Ecosystem Advisory Group
AMD and Intel released the AI Compute Extensions specification, marking the x86 Ecosystem Advisory Group's first joint matrix-multiplication standard since the rivals formed the consortium in October 2024 to fend off Arm.
Overview
AMD and Intel have jointly released a new specification meant to standardise matrix-multiplication acceleration across x86 processors, the most concrete technical deliverable yet from the cross-rival consortium the two chipmakers stood up in late 2024. According to Network World, the new architecture is called ACE, short for AI Compute Extensions, and “aims to unify AI workloads on x86 CPUs.”
The move is the first major outward sign that the x86 Ecosystem Advisory Group (EAG) — formed by the two long-time competitors in October 2024 — is producing shared instruction-set work, rather than just industry messaging. It also lands as Intel’s leadership argues that on-CPU AI inference is becoming a strategic battleground for the x86 platform.
What ACE Actually Is
ACE is positioned as an extension to the existing Advanced Vector Extensions (AVX) family that already lives inside modern x86 cores. Network World reports that the specification “offers a significant increase in the performance of matrix multiplication performance while offering scalability and energy efficiency,” with matrix multiplication being the central numerical operation used by neural networks and large language models.
Unlike a typical product launch, AMD and Intel did not announce any chips that actually contain the new instructions. As Network World summarises, “the two firms did not announce any product, and there are no indications when they will be releasing products with ACE anytime soon.” ACE is being released as a specification first, with hardware support to follow on a timeline neither company has committed to.
Industry analyst Jim McGregor of TIRIAS Research, quoted by Network World, struck a measured note: “The CPU will never be more efficient than the GPU/AI accelerator,” he said, while adding: “I’m pleased to see the partnership between the two companies finally paying off.”
Why the EAG Was Created
The EAG itself was unveiled on October 15, 2024, when AMD and Intel announced what The Register described as the formation of an “ecosystem advisory group” intended to coordinate the future of the x86 instruction set. The Register noted that “a more consistent ISA could help stave off the growing number of Arm-compatible CPUs finding homes in cloud datacenters,” framing the group from the outset as a competitive response to Arm-based servers.
The founding members went well beyond the two chipmakers. According to The Register, the group launched with “Broadcom, Dell, Google, HPE, HP, Lenovo, Meta, Microsoft, Oracle, Red Hat, as well as individuals, including Linux kernel-dev Linus Torvalds and Epic’s Tim Sweeney.”
Intel’s own announcement that day cast the move in historical terms. In the Intel press release, then-CEO Pat Gelsinger said, “We are on the cusp of one of the most significant shifts in the x86 architecture and ecosystem in decades.” AMD chair and CEO Lisa Su added: “Establishing the x86 Ecosystem Advisory Group will ensure that the x86 architecture continues evolving as the compute platform of choice.” The same release noted that Intel and AMD had previously collaborated on “PCI, PCIe (PCI Express), Advanced Configuration and Power Interface (ACPI), and USB” — pitching the new group as the next step in that lineage.
Day-to-day responsibility for the work was assigned to senior datacenter executives at both companies. The Register identified them as “AMD EVP of datacenter solutions Forrest Norrod” and “Intel EVP of datacenter and AI group Justin Hotard.”
Why This Matters Now
ACE’s release comes as Intel reframes its AI strategy around inference workloads that run on CPUs rather than dedicated accelerators. According to The Register, Intel CEO Lip-Bu Tan told investors on the company’s Q1 2026 call that “the CPU is reinserting itself as the indispensable foundation of the AI era,” and that “inference is going to be a much bigger market and the physical AI is another big market.”
The Register reported that Intel’s Q1 2026 revenue reached $13.6 billion and that “AI-driven business lines comprised 60% of revenue.” The same article noted that the company’s Xeon 6 was “selected as host CPU for Nvidia’s DGX Rubin NVL8 systems” — a high-profile design win that depends on x86 CPUs remaining competitive companions to GPU accelerators.
A standardised matrix-acceleration extension that runs identically on AMD and Intel silicon would, in principle, help anchor that argument by giving software written for one vendor’s chip a guarantee of performance parity on the other’s. ACE’s release as a joint, vendor-neutral specification — rather than another single-vendor extension — is the most direct attempt yet to make that guarantee.
What We Don’t Know
Neither AMD nor Intel has named a product line that will be the first to ship ACE in silicon, nor a release year. Network World was explicit that “there are no indications when they will be releasing products with ACE anytime soon.” The cadence at which compilers, operating systems, and AI frameworks pick up the new instructions also remains an open question, as does whether other EAG members — particularly the cloud providers among the founders — will commit to ACE-aware deployments before hardware ships.
What is clear is that, eighteen months after their unusual public truce, AMD and Intel have moved from forming a committee to issuing a joint instruction-set specification — a level of cooperation between the two x86 rivals that has few modern precedents.