Intel

Intel combines gallium nitride power transistors with silicon digital logic on an ultra-thin 19-micrometer chiplet harvested from 300mm wafers, targeting AI data center power delivery and 5G/6G infrastructure.

Intel's Heracles processor, developed under DARPA's DPRIVE program, performs computations on fully encrypted data without decryption, achieving speedups of 1,074 to 5,547 times over a 24-core Xeon.

Intel is in advanced talks with Google and Amazon for EMIB-based chip packaging services worth billions annually, positioning its foundry division as a credible alternative to TSMC's constrained CoWoS capacity.

Intel's Core Ultra 7 270K Plus and Core Ultra 5 250K Plus ship with additional efficiency cores, native DDR5-7200 support, and aggressive pricing that undercuts their predecessors by up to $100, though AMD's X3D chips retain the gaming crown.

Both x86 chipmakers have notified OEMs of 10-15% price increases effective March-April, as AI data center demand consumes manufacturing capacity and pushes delivery times from weeks to months.

UCIe 3.0 wins its first interoperability demonstrations, TSMC targets 130,000 CoWoS wafers per month by year-end, and Rebellions ships the first quad-chiplet AI accelerator with UCIe interconnects — three signals that the chiplet era is moving from specification to silicon.

TSMC and Intel have entered preliminary discussions to form a joint venture that would see TSMC operate Intel's U.S. manufacturing facilities, with the Taiwanese chipmaker holding up to 20 percent and pitching Nvidia, AMD, and Broadcom as co-investors.

Linus Torvalds confirms the next kernel will be 7.0, citing confusion over large numbers, as the first RC ships with one of the largest merge windows on record.

Intel CEO Lip-Bu Tan reveals plans to build data-center GPUs and hires former Qualcomm architect Eric Demers to lead the effort.