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NVIDIA Groq 3 LPX Inference Chip Enters Full Production, Claiming 4x Faster Response for Coding Agents

NVIDIA's Groq-derived Groq 3 LPX inference accelerator is now shipping, promising ultrafast token generation for agentic coding workloads, with Nebius first to deploy it.

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Overview

NVIDIA said its Groq 3 LPX inference accelerator has entered full production, positioning the chip as a dedicated speed boost for AI agents that need to generate tokens quickly rather than in bulk. The announcement, made at the Hot Chips conference, according to NVIDIA’s press release, frames Groq 3 LPX as an extension of NVIDIA’s Vera Rubin platform built specifically to speed up the “generation” phase of inference — the step that determines how responsive an AI agent feels while it reasons, calls tools, and iterates on tasks like writing and testing code.

What We Know

  • NVIDIA Groq 3 LPX is described as “the interactive AI inference accelerator” and is “now in full production,” an extension of the Vera Rubin platform aimed at “enabling ultrafast token generation for highly responsive agentic systems,” according to NVIDIA.
  • In Artificial Analysis benchmarking, the chip delivered a record 3,400 output tokens per second running the open-source agentic model Gemma 4 31B with a 100,000-token context, which NVIDIA calls “the fastest performance ever recorded for the model,” per NVIDIA’s press release.
  • NVIDIA says Groq 3 LPX “enables agentic tasks such as coding in minutes versus hours, providing 4x faster responsiveness for agents and latency-sensitive workloads than the nearest alternative platform,” according to NVIDIA.
  • “Inference is the growth engine of AI. NVIDIA Grace Blackwell and NVL72 revolutionized large language model inference with an unprecedented leap in performance and efficiency,” said Jensen Huang, founder and CEO of NVIDIA. “Vera Rubin extends that vision with workload-optimized AI factory configurations designed for the era of agentic AI, advancing the performance frontier with LPX for ultrafast token generation,” he added, per NVIDIA’s press release.
  • Nebius is the first AI cloud provider to adopt the chip, planning to bring it to its Nebius Token Factory inference platform. “Generation is the phase of inference that determines how responsive an AI system actually is, and that’s exactly what NVIDIA Groq 3 LPX is built to accelerate,” said Danila Shtan, chief technology officer of Nebius, adding that the goal is to make “every step of an agent’s loop feels instant — through the same API developers are already using, with no migration to a new stack,” according to NVIDIA.
  • Groq itself — the AI inference startup whose technology underpins the new chip — plans to be “among the platform’s earliest adopters” following Nebius, per NVIDIA’s press release. NVIDIA’s trademark notice on the release confirms that “Groq and LPU are used under license from Groq, Inc.”
  • Groq 3 LPX racks pair with NVIDIA BlueField-4 DPUs, Vera CPU racks, Vera BlueField-4 STX storage, and Spectrum-6 SPX Ethernet, forming part of what NVIDIA calls “extreme codesign across seven chips and five purpose-built racks,” according to NVIDIA.
  • NVIDIA first detailed the underlying hardware at its GTC 2026 keynote in March, when CEO Jensen Huang revealed how the company was using intellectual property it had acquired from Groq the previous year to expand the Rubin platform, according to Tom’s Hardware. The Decoder described the arrangement as a “quasi-acquisition of Groq” that gave NVIDIA a dedicated inference pipeline for the first time, The Decoder reported.
  • Unlike most AI accelerators, which rely on HBM memory, each Groq 3 LPU chip incorporates 500 MB of SRAM — the type of memory typically used for high-speed caches on CPUs and GPUs. That SRAM delivers 150 TB/s of bandwidth, compared with 22 TB/s from the 288GB of HBM4 on each Rubin GPU, according to Tom’s Hardware.
  • A full Groq 3 LPX rack comprises 256 LPUs — 32 compute trays of eight LPUs each, connected through a direct chip-to-chip copper spine — offering 128GB of aggregate SRAM, 40 PB/s of bandwidth, and a 640 TB/s scale-up interface per rack, according to Tom’s Hardware and The Decoder.
  • At GTC, NVIDIA hyperscale VP Ian Buck said the chip was designed to boost decode performance at “every layer of the AI model on every token,” positioning it as a co-processor for Rubin GPUs in multi-agent systems, according to Tom’s Hardware.
  • Combined with NVIDIA’s NVL72 rack, the Groq 3 LPX system reportedly delivers “up to 35x more tokens and 10x more revenue opportunity for trillion-parameter models compared to Blackwell,” with availability originally slated for the second half of 2026 — a timeline today’s full-production announcement fulfills, per The Decoder.
  • On its developer blog, NVIDIA described the chip’s role within its broader agentic AI stack: “Rubin GPUs process large context and decode efficiently, Vera CPUs handle tool execution and KV-cache offload, and Groq 3 LPX unlocks ultrafast interactivity,” according to NVIDIA’s technical blog. The same post highlights SemiAnalysis’s open-source AgentX benchmark, which the company said “addresses that gap by measuring serving performance across prerecorded Claude Code sessions with interleaved reasoning and tool use,” replaying real coding-agent traffic to test inference platforms under realistic conditions.

What We Don’t Know

NVIDIA has not disclosed pricing for Groq 3 LPX or a broader customer list beyond Nebius and Groq itself. The company’s own performance-per-watt figures for its Vera Rubin platform, published alongside the Groq 3 LPX news, are explicitly labeled by NVIDIA as “pending SemiAnalysis review,” meaning the throughput-per-megawatt claims have not yet been independently verified by the benchmark’s maintainer. The financial terms of NVIDIA’s original technology arrangement with Groq, Inc. have also not been confirmed through any source accessible for this article.

Analysis

The chip’s positioning speaks to a shift in how NVIDIA is framing AI hardware demand: away from raw training throughput and toward the latency of individual inference steps inside multi-step agent loops. Tom’s Hardware noted that the addition of a dedicated, SRAM-based inference chip could help Rubin compete with rivals like Cerebras, whose wafer-scale, SRAM-heavy chips have won inference business from customers including OpenAI on the strength of low-latency serving, according to Tom’s Hardware. By licensing Groq’s SRAM-based LPU architecture rather than building a competing design from scratch, NVIDIA is folding a competitor’s low-latency approach directly into its own platform — a move The Decoder characterized as letting customers “buy comparable hardware directly from Nvidia,” per The Decoder. For software teams building coding agents, the practical claim to watch is the 4x responsiveness figure tied specifically to agentic coding tasks — a benchmark that, if it holds up under independent testing such as SemiAnalysis’s Claude Code-session replay, would directly affect how quickly tools like automated coding agents can iterate on a task.