HBM4 Enters Mass Production as All Three Memory Giants Race to Supply NVIDIA's Vera Rubin
Samsung, SK Hynix, and Micron have all confirmed high-volume HBM4 production for NVIDIA's Vera Rubin platform at GTC 2026, with 12-layer stacks delivering 2.8 TB/s bandwidth and 16-layer samples already shipping to customers.
The three companies that control nearly all of the world’s high-bandwidth memory supply have each confirmed mass production of HBM4, the fourth generation of the stacked DRAM technology that has become the defining bottleneck of the AI hardware era. Samsung, SK Hynix, and Micron made overlapping announcements at and around NVIDIA’s GTC 2026 conference this week, each positioning itself as a volume supplier for NVIDIA’s Vera Rubin GPU platform, which is scheduled to ship in the second half of 2026.
A New Generation of Stacked Memory
HBM4 represents a significant architectural leap over its predecessor, HBM3E. At the 12-layer configuration now entering mass production, each stack holds 36 GB of DRAM and operates at pin speeds exceeding 11 Gb/s, delivering aggregate bandwidth greater than 2.8 TB/s per stack. Micron reports that this translates to a 2.3-times bandwidth improvement and more than 20 percent better power efficiency compared to its HBM3E product at the same 36 GB, 12-layer configuration.
The jump in per-stack bandwidth is largely enabled by a redesigned base die. Unlike previous HBM generations, which used a passive silicon interposer at the bottom of the stack, HBM4 introduces a logic base die fabricated on an advanced process node. SK Hynix sources its base die from TSMC’s 12 nm logic process, while Samsung uses its own in-house 4 nm node, a divergence in approach that reflects each company’s broader foundry strategy.
NVIDIA’s Vera Rubin R100 GPU, built on TSMC’s 3 nm process, carries eight HBM4 stacks per package, providing 288 GB of total memory capacity and 22 TB/s of aggregate bandwidth. At the full NVL72 rack scale, that puts the system’s total memory bandwidth above 1.5 exabytes per second.
The Supplier Race
Samsung was the first to begin shipping HBM4, with confirmed deliveries starting in February 2026. The company passed NVIDIA’s demanding qualification tests at data rates exceeding 10 Gb/s and has been ramping production at its Pyeongtaek campus, with plans to expand total HBM wafer capacity to roughly 250,000 wafers per month by the end of the year, a 47 percent increase from current levels.
SK Hynix, which held approximately 53 percent of the overall HBM market in Q3 2025, has secured roughly two-thirds of NVIDIA’s initial HBM4 orders and is mass-producing at its M16 plant in Icheon and the M15X fab in Cheongju. The company demonstrated a 16-layer HBM4 stack at CES 2026 and has announced a 19 trillion won ($13 billion) investment in an advanced chip packaging facility at Cheongju, scheduled for completion by end of 2027.
Micron entered the race with a GTC 2026 announcement confirming high-volume production of its 36 GB 12-layer HBM4, along with samples of a 48 GB 16-layer stack that provides a 33 percent capacity increase per placement. Micron also confirmed it is shipping the industry’s first PCIe 6.0 data center SSD, the Micron 9650, alongside a new SOCAMM2 module with up to 256 GB capacity, making it the first supplier to bring all three product categories to volume for the Vera Rubin ecosystem simultaneously.
“The next era of AI will be defined by tightly integrated platforms developed through joint engineering innovations across the ecosystem,” said Sumit Sadana, executive vice president and chief business officer at Micron.
16-Layer Stacks and the Road to HBM4E
While 12-layer stacks dominate current production, all three suppliers are racing toward 16-layer HBM4, which NVIDIA has requested for delivery by the second half of 2026. Each 16-layer stack holds 48 GB and delivers bandwidth exceeding 2 TB/s, but the engineering challenge is severe: wafer thickness must drop to roughly 30 micrometers, about 40 percent thinner than the 12-layer version, while the total package height must stay within JEDEC’s 775-micrometer limit.
SK Hynix demonstrated a working 16-layer stack using its advanced MR-MUF (Mass Reflow Molded Underfill) packaging process, which the company says improves heat dissipation by approximately 1.6 times. Samsung, meanwhile, has reported hybrid bonding yields for advanced stacks at around 10 percent, a figure it will need to improve significantly before 16-layer production becomes commercially viable.
Beyond HBM4, the next generation, HBM4E, is already in development. Industry analysts expect it to capture up to 40 percent of the HBM market by 2027, with both Samsung and SK Hynix targeting completion of HBM4E development in the first half of 2026.
Market Dynamics
The simultaneous ramp by all three suppliers underscores the scale of demand. Market share projections for 2026 show SK Hynix at roughly 50 percent of total HBM supply, down from 59 percent in 2025, as Samsung climbs to 28 percent from 20 percent. Micron, which exited the consumer memory and storage market in December 2025 to focus entirely on data center customers, is expected to hold the remaining share.
The concentration of semiconductor manufacturing capacity on HBM has had far-reaching consequences. Server-grade DRAM module prices have climbed to approximately $1.30 per gigabit, approaching HBM3E pricing territory. Consumer DRAM and NAND flash prices have surged in tandem, with some consumer SSD models doubling in cost since late 2025, a dynamic that has already forced GPU makers to reduce memory configurations on mainstream gaming cards.