Intel's Diamond Rapids Xeon 7 Drops Hyperthreading for Up to 192 Performance Cores, Slated for 2027 on 18A-P
At Computex, Intel detailed its Diamond Rapids Xeon 7: up to 192 P-cores on 18A-P, 16 DDR5 channels and PCIe 6.0, but no Hyperthreading, arriving 2027.
Overview
Intel used its Computex 2026 appearance to detail Diamond Rapids, the performance-core member of its next-generation Xeon 7 family, confirming that the chip will scale to as many as 192 cores but will drop simultaneous multithreading entirely. According to Tom’s Hardware, the part is officially slated to launch in 2027 and will be built on Intel’s 18A-P process, a refined version of the 18A node. The disclosure positions Diamond Rapids as the high-performance counterpart to the efficiency-core Xeon 6+ that Intel launched at the same event.
What We Know
Diamond Rapids tops out at 192 cores, which Intel reaches by combining four 48-core compute chiplets, according to The Register. That represents a roughly 50 percent increase in core count over the prior generation, as reported by Tom’s Hardware.
The headline architectural change is the removal of Hyperthreading, Intel’s brand name for simultaneous multithreading (SMT). The Register reported that Hyperthreading is “officially dead” on the part, a change that cuts the chip’s thread count by a quarter relative to a hypothetical SMT-enabled design. Intel does not intend the move to be permanent: The Register reported that SMT is expected to return in the following generation, codenamed Coral Rapids.
Unlike the all-efficiency-core Clearwater Forest design, Diamond Rapids uses Intel’s performance cores, according to Tom’s Hardware. On the platform side, the chip moves to 16 channels of DDR5 memory, according to The Register, and adds PCIe 6.0 support, as reported by Tom’s Hardware. Tom’s Hardware reported that the wider memory configuration delivers twice the memory bandwidth of earlier Xeon parts; The Register put the resulting figure at an estimated 1.2 TB/s of bandwidth per socket.
What We Don’t Know
Intel has not published final clock speeds, TDP ranges, cache capacities, or SKU-level pricing for Diamond Rapids, and the parts are still more than a year from launch. The platform details disclosed at Computex describe the top of the lineup; how core counts, memory speeds, and power envelopes scale across the rest of the stack remains unannounced. Performance claims tied to the new P-core design and the AI-acceleration features Intel typically builds into its server cores were not quantified in the materials reported by these outlets, and no independent benchmarks exist for a chip that has yet to ship.
The timeline itself carries risk. A 2027 launch leaves Diamond Rapids trailing competitors that are reaching the market sooner. The Register noted that AMD’s competing EPYC Venice, a 256-core part, could beat Intel to market by as much as a year.
Analysis
Diamond Rapids and Clearwater Forest together define Intel’s two-pronged server strategy on its 18A-class processes: an efficiency-core part aimed at scale-out density, and a performance-core part aimed at workloads that prize per-core throughput. The Xeon 6+ “Clearwater Forest” chips that Intel launched at the same Computex lean on up to 288 Darkmont efficiency cores; Diamond Rapids instead bets on fewer, heavier performance cores.
The decision to ship a flagship server CPU without SMT is the most consequential detail. Hyperthreading has been a fixture of Intel’s high-end Xeons for years, and removing it trades raw thread count for whatever per-core advantages Intel sees in physical-core scaling — a calculation the company has signaled it will revisit, given that SMT is slated to return in Coral Rapids. The competitive backdrop sharpens the stakes: AMD’s EPYC Venice is already ramping on TSMC’s 2nm node with 256 cores, meaning Intel’s 192-core P-core flagship will arrive into a market where its closest rival offers more cores and a head start. For Intel, Diamond Rapids is less about winning the core-count race outright than about demonstrating that its 18A-P process can carry a competitive performance-core data center product into 2027.